Posted DateJune 11, 2014
A scalable hardware architecture and associated algorithm for faster computing of the Discrete Periodic Radon Transform (DPRT) for prime-sized images.This research group has come up with a parameterizable approach that can be implemented with limited hardware resources while allowing for the maximum...
scalable hardware architecture
limited hardware resources
technology description researchers
computing 2d convolutions
commercializes technologies developed
Posted DateJuly 25, 2016
Parallel algorithms for implementing the forward and inverse Discrete Periodic Radon Transform for CPU and GPU architectures.For image sizes that become sufficiently large, this process provides noticeably faster processing speeds. The hardware-based DPRT has the advantage of not having input/output...
performing complex computations
technology description researchers
input/output bottleneck due
developed parallel algorithms
Posted DateJuly 20, 2017
Fast and scalable architectures that can compute real-time convolutions with relatively large kernels.BackgroundConvolution and cross-correlation are essential tools for a wide range of applications in the field of image and video processing. A standard approach for developing efficient architecture...
implement complex arithmetic
floating point numbers
1-d fft processors
systolic array implementations
compute real-time convolutions